As embedded processing demands grow, 64-bit multi-core processors are crucial for balancing cost, power, and performance. Venki Narayanan, Marketing Director at Microchip Technology’s FPGA unit, shares with EFY how their expanded PIC64 portfolio meets these needs.
Q. Could you provide a more detailed introduction to the PIC64 portfolio products?
A. With the launch of its PIC64portfolio, Microchip is expanding its computing range to meet the rising demands of today’s embedded designs. PIC64GX MPUs, the first of the new product line to be released, enable intelligent edge designs for the industrial, automotive, communications, IoT, aerospace and defence segments. The addition of our 64-bit MPU portfolio allows us to offer low, mid and high-range compute processing solutions. Making Microchip a single-vendor solution provider for MPUs, the PIC64 family will be designed to support a broad range of markets requiring real-time and application class processing.
Microchip’s PIC64GX MPUs address specifically the mid-range intelligent edge compute needs with a 64-bit RISC-V quad-core Linux-capable processor featuring asymmetric multi-processing (AMP) and real-time deterministic processing capabilities. PIC64GX is enabled through various operating systems, build systems, drivers and various open source and commercial tools. The RISC-V CPU micro-architecture implementation features a simple, 5-stage single-issue, in-order pipeline immune to the Meltdown and Spectre exploits found in standard out-of-order machines. It includes five RISC-V cores coherent with a flexible memory subsystem, allowing a versatile mix of deterministic real-time systems and Linux in a single, multi-core processor cluster. With built-in secure boot, a rich set of embedded peripherals, and these features, the RISC-V MPU provides developers with new choices in secure, power-efficient, embedded compute platforms.
Q. How does the asymmetric multi-processing (AMP) feature benefit applications?
A. Compute-intensive applications such as secured embedded vision and AI/ML are pushing the boundaries of power-efficient computing, and they need to be able to run mixed-criticality application workloads including Linux and real-time operating systems (RTOSs) in the same processor subsystem. Furthermore, these applications demand high performance, hardware-level security, secure boot and reliability at the intelligent edge. To meet these requirements, intelligent edge applications can utilise 64-bit compute solutions capable of running these functions and BareMetal in the same homogenous processor cluster, a concept known as AMP. Additionally, embedded system designers require a comprehensive end-to-end solution, from silicon to embedded ecosystem, to accelerate time to market.
Q. Why did Microchip choose the 64-bit RISC-V architecture for the initial launch of the PIC64 products?
A. There are two main reasons: time to market and to be able to offer a solution for mixed-criticality systems using a homogenous application class processor cluster with the minimum development cost as well as a minimum number of transistors.
Q. What are your considerations for selecting between RISC-V and Arm architectures in the future?
A. To be clear, PIC64GX is the first of several planned families under the PIC64 platform, and we will support other ISAs, depending on the problem we are trying to solve. To speed our market entry, we leveraged the same microprocessor subsystem architecture as PolarFire SoC, an SoC FPGA that has been on the market since 2022.
Q. The PIC64GX is also a quad-core processor. Why did you choose four cores for its design, and how are computing resources allocated among them?
A. Mixed-criticality systems will need multiple cores independently running Linux OS, RTOS and BareMetal, so having a multi-core cluster that can support multiple workloads is mandatory. With a quad-core processor + fifth core for monitoring functions, customers can run either a SMP Linux or SMP RTOS such as Zephyr on all four cores. To run RTOS, the cache lines can be configured as tightly coupled memories and further turn off-branch prediction to give the deterministic latency, which is critical to achieve real-time performance.
For mixed-critical applications, system designers will need to run Linux OS to do host functions and run live workloads with low latency and deterministic latency simultaneously in the same processor subsystem.
With PIC64GX, With PIC64GX, developers can accomplish both deterministic and non-deterministic compute tasks in a single chip. They distribute computing resources, as needed, with the added advantage of assigning resources per application. A system designer determines the throughput for host functions: what is the throughput he or she wants for a real-time workload? How much memory do they need etc. With PIC64GX, designers can actually make that decision and configure the system in a flexible manner.
For example, developers can partition the system to run SMP Linux on one partition with three processor cores and RTOS on the other with one processor core and partition the flexible L2 memory into two partitions of 1MB each. One L2 partition of 1MB is assigned to the Linux partition as L2 cache, and the other 1MB is configured as scratchpad memory for running RTOS.
Q. Can you provide details on the software design resources for PIC64 products, including compatibility, ease of use, and stability?
A. Microchip provides a comprehensive embedded software ecosystem needed to design with PIC64GX. This includes Linux® build systems like Yocto and Microchip Buildroot External; Linux4Microchip, which includes boot loaders, kernel updates, and build systems targeting Microchip devices; a partnership with Canonical Ubuntu for pre-programming our PIC64GX1000 Curiosity Kit; and DevTools such as MPLAB extensions for VS code to compile, program, and perform basic debugging based on the most popular development environment.
Q. What competitive advantages does Microchip offer in the 64-bit MPU market despite the late market entry?
A. Our differentiated products and a continued leadership in the sector are the advantages. The PIC64GX offers asymmetric computing capabilities, as well as defence grade security, with support for imaging pipelines in a homogenous processor cluster, therefore minimising transistor footprint and not having to resort to a large heterogeneous and varied processor cluster, that increases cost and complexity. The PIC64-HPSC offers the extensive advancement in AI-enabled space computing capabilities, covering low earth orbit all the way to the harshest deep-space environments
- Besides, the consistent superiority that we have already provided to the embedded systems community in the 8- to 32-bit segments, underwritten by a ubiquitous development platform (MPLAB). MPLAB, on average, is turned on 50,000+ times a day! When you have such a large and loyal development community already using our computing solutions, it is only reasonable to assume that this community will be happy to add a 64-bit option to our portfolio.
With the introduction of the PIC64 portfolio, Microchip has become the only embedded solutions provider actively developing a full spectrum of 8-, 16-, 32- and 64-bit micro-controllers and micro-processors. Microchip announced the MPLAB Extensions for VS Code® on June 25. These provide a seamless, flexible and efficient development environment with comprehensive support for designs based on our devices including 64-bit processors, enabling developers to migrate to higher-performance compute elements depending on their application requirements.
Q. How does Microchip believe its investment in embedded solutions from 8-bit to 64-bit will impact the industry?
A. Given our already existing footprint in intelligent edge systems, these new 64-bit processors will offer a huge upgrade in terms of computing capabilities and product diversification. The critical need that we are trying to address is the addition of real-time intelligence to these mixed criticality edge-based systems
We also believe the community is always seeking more suppliers to offer differentiated processing solutions. And what better way to do this than to have an established and reliable solution provider like Microchip enter the market.
Lastly, we recognise that our clients have a development environment where hardware development is increasingly becoming uniform, and differentiation is provided through software. We are in a great position to help by providing total system solutions around our processing platforms. Clients can get an end-to-end hardware offering covering almost everything they need for post-sensor processing hardware in edge systems – connectivity, analogue, power management, security, acceleration and many others. Robust software development and application layer tools then support this. We call this concept ‘total system solutions’ and it has been a system-level differentiator for us.
Q. Arm’s ARMv8, introduced in 2011, brought 64-bit support and appeared in smartphones by 2013. Why has 64-bit adoption in MPUs lagged, and what technical challenges come with moving from 32-bit to 64-bit systems?
A. Microchip is a leader in 8, 16, and 32-bit embedded solutions. The performance requirements for embedded processing are growing across all markets and 64-bit multi-core processors must be able to meet these requirements. There are always cost, power and performance trade-offs depending on the requirements for various end market applications. 32-bits offer a lower bus width, and therefore lower semiconductor cost, and a smaller number of transistors (therefore lower power). As computing needs increase, we need to offer diverse solutions depending on these trade-offs (power, cost, performance).
Q. How can embedded MPUs leverage the rise of Edge AI, Generative AI, and AIoT? What are Microchip’s MPU plans ahead?
A. The key trend we are addressing is the addition of real-time, low latency, asymmetric multi-processing for mixed-criticality systems in the application areas such as industrial automation, IIoT and ML Inferencing. We are addressing these through innovative 8- through 64-bit products, ranging from low-level embedded systems control to post-sensor payload processing. We will continue adding new MPU solutions and devices over the next many quarters.
Q. Is the line between MCUs and MPUs blurring, and will hybrid products become the future standard?
A. Yes, we do see multi-core solutions incorporating both MPU and MCUs in the same embedded processing system. However, they incorporate separate MPU and MCU subsystems with separate memory and peripheral subsystems within the same chip.
With PIC64GX, we provide a homogenous processor architecture with large on-chip memory so that customers can configure any processor core to implement MCU functions, partition the memory subsystem, and assign to MPU and MCU partitions depending on their processing requirements.
However, not all applications will need both MCU and MPU functions. Some may only need low-end microcontroller functions and don’t need to be able to run Linux host functions. Some applications will require mid to high-end microprocessor functions. It all depends on the application use cases. System designers can make those system architecture decisions based on the application needs. Microchip offers comprehensive compute solutions to meet a wide range of computing requirements and total system solutions, including memory, power management, analogue functions and connectivity solutions.
